Oscillator circuits are used in a wide range of applications including digital electronic circuits to generate clock signals. A two-terminal Pierce-type oscillator is one of the most frequently used clock signal generator circuits.
A two-terminal Pierce-type oscillator circuit is shown schematically in FIG. 1. The circuit is in the form of an on-chip gain circuit 10 connected to an external feedback circuit 50. The on-chip gain circuit 10 has an inverter circuit I that is arranged to provide amplification and a phase shift of substantially 180° between an input IN of the inverter and an output OUT of the inverter.
The external feedback circuit 50 is in the form of a pi network provided by a crystal Q, capacitors C1 and C2 and resistor Rd. The pi network is arranged to provide a phase shift of 180° (pi radians) between input and output terminals of the feedback circuit 50. The input and output terminals of the feedback circuit 50 are connected to the output OUT and input IN terminals of the gain circuit 10, respectively. A total phase shift of 360° is therefore provided by the gain circuit 10 in combination with the external feedback circuit 50. Provided that the closed loop gain of the oscillator circuit is greater than or equal to unity, sustainable oscillations can be established.
A feedback resistor RF feeds a potential at the output OUT of the inverter I back to the input IN so as to bias the inverter to a high gain linear region of operation. The dc bias potential of the inverter input and inverter output are therefore maintained substantially equal.
Resistor Rd is provided in order to limit the output of the inverter such that the crystal is not over driven. Rd and C2 also form a low pass filter arranged to reduce spurious high frequency oscillation.
An implementation of the oscillator circuit of FIG. 1 is shown schematically in FIG. 2. A metal oxide semiconductor field effect transistor (MOSFET) transistor pair MP1, MN1 have their source and drain electrodes connected in series between voltage nodes Vdd and gnd. Transistors MP1 and MN1 form an inverter whose input IN is connected to the gate electrodes of the transistors and whose output OUT is connected to a junction between the source and drain electrodes of the transistors. The input IN of the inverter corresponds to an input of the gain circuit 110 whilst the output OUT of the inverter corresponds to an output of the gain circuit 110. Input IN and output OUT are connected to capacitors C1 and C2 respectively, which are in turn connected to gnd.
A feedback resistance RF is connected between the input IN and output OUT as discussed with respect to FIG. 1. Feedback resistance RF is arranged to bias the inverter into a linear amplification region of operation.
As CMOS technology continues to scale to sub-100 nm feature sizes, it is found that in certain circumstances oscillator performance is adversely affected. In some cases, oscillator circuits are unable to commence oscillation when power is supplied to the circuit.